Research Bits: July 29

Sort-in-memory

Researchers from Peking University and the Chinese Institute for Brain Research developed a sort-in-memory hardware system based on memristors that is tailored for complex, nonlinear sorting tasks.

The comparator-free processing-in-memory architecture is built on a one-transistor–one-resistor (1T1R) memristor array, using a Digit Read mechanism that replaces traditional compare-select logic to improve computational efficiency. The system also employs a Tree Node Skipping (TNS) algorithm, which speeds up sorting by reusing traversal paths and reducing unnecessary operations. Three Cross-Array TNS were used to make the system capable of handling varying data widths and complexities.

In performance tests, the researchers said that the memristor chip in an FPGA delivered up to 7.7x faster speed, 160x higher energy efficiency, and 32x greater area efficiency compared to ASIC-based sorting systems. It also performed well in practical applications, including path planning and enabling run-time tunable sparsity in neural network inference. [1]

Nervous system for robots

Researchers from the Korea Advanced Institute of Science and Technology (KAIST), the National Nanofab Center, and Chungnam National University built a neuromorphic semiconductor-based artificial sensory nervous system for robots.

The team created a memristor with an additional layer that alters conductivity in opposite directions, enabling it to more realistically emulate the dynamic synaptic behaviors of a real nervous system such as habituation and sensitization, which are responsible for decreasing the system’s response to repeated safe stimuli but quickly regaining sensitivity when a danger signal is detected.

The memristor was used in an artificial sensory nervous system for a robotic hand that is capable of recognizing touch and pain. The robot hand gradually habituated to repeated safe tactile stimuli, eventually ignoring them. When stimuli were later applied along with an electric shock, it recognized it as a danger signal and began reacting sensitively again.

“By mimicking the human sensory nervous system with next-generation semiconductors, we have opened up the possibility of implementing a new concept of robots that are smarter and more energy-efficient in responding to external environments,” said See-On Park, a researcher at KAIST, in a press release. “This technology is expected to be utilized in various fusion fields of next-generation semiconductors and robotics, such as ultra-small robots, military robots, and medical robots like robotic prosthetics.” [2]

RF signal processing

Researchers from the University of Massachusetts Amherst, Texas A&M University, and TetraMem developed an RF signal processing system based on analog in-memory computing within a memristive SoC.

“The memristive system-on-a-chip offers an identification accuracy of over 90 percent and is up to 6.8 times more energy efficient and up to 6.2 times faster than traditional digital-processing platforms,” said Qiangfei Xia, professor in the UMass Amherst Electrical and Computer Engineering Department, in a statement.

Capable of directly processing RF signals in memory, the SoC combines an analog discrete Fourier transform for spectrum analysis, a mixer-free demodulator for in-phase and quadrature demodulation, and analog neural networks for radio frequency transmitter identification and anomaly detection. [3]

References

[1] Yu, L., Zhang, T., Wang, Z. et al. A fast and reconfigurable sort-in-memory system based on memristors. Nat Electron 8, 597–609 (2025). https://doi.org/10.1038/s41928-025-01405-2

[2] Park, SO., Jeong, H., Seo, S. et al. Experimental demonstration of third-order memristor-based artificial sensory nervous system for neuro-inspired robotics. Nat Commun 16, 5754 (2025). https://doi.org/10.1038/s41467-025-60818-x

[3] Huang, Y., He, C., Ling, Y. et al. Radiofrequency signal processing with a memristive system-on-a-chip. Nat Electron 8, 587–596 (2025). https://doi.org/10.1038/s41928-025-01409-y

Alternative Text

Jesse Allen

  (all posts)

Jesse Allen is the Knowledge Center administrator and a senior editor at Semiconductor Engineering.